Aging Impact Minimization on a Transmitter Jitter

Radio engineering

Abstract

Nowadays, technological processes actively continue to shrink the transistor’s channel and Moor’s law is still driving the silicon market. The transistor channel gets actively shrunk, while supply voltages do not follow that much dynamics and do not get decreased by the same per-cent. This scenario increases the aging phenomenon.
The simulations of a serial-link transmitter are implemented, considering the aging pro-cess of the MOSFET device within 10 years. The aging is simulated for the idle mode of the transmitter, while pre-driver buffers are in a static state and only the PMOS or only the NMOS transistor has gate-source and gate-substrate voltage differences, hence only one of the devices is affected by the aging process. As a result, the duty cycle of pre-driver stages is distorted, which creates an extra jitter at the transmitter’s output.
In this paper, a technique is proposed to ensure the same degradation for the pre-driver PMOS and NMOS transistors during the aging process. It allows to have the same delay for transitions from logic ‘1’ to ‘0’ and from ‘0’ to ‘1’, hence the duty cycle distortion will not be created. As a result, the output jitter of the transmitter gets reduced, hence increasing the noise immunity by creating an extra margin for the noise induced jitter.